# ORGComp Hardware

## Overview

This project is one that I started a long time ago. I started off designing it
with BJTs, and then decided to swap to FETs and got bored.

This project is a fully custom design for a computer, designed from the
transistor level up. I am making this because I find computing *fascinating*,
and because I think it would be a cool project to show off at opensauce
sometime.

Documentation once made will be available in the `docs` directory and may be
rendered using `mdbook`.

Files in the `sims` directory are save files for `SimulIDE` (available in
several Linux package repositories). I will try to have some 'train of thought'
notes in text boxes in these files, and I intend to keep them as a record of
how decisions were made so I can go back and see my growth and the project's
history better.

## Part Names

Since I want this project to be somewhat modular to aide in abstraction,
maintenance, and debugging, I have decided to make a naming scheme that will
guarantee that parts are named in a way that is easy to find and easy to expand
and modify.

The naming scheme I plan on using is two-fold: each part will be assigned a
name in the form `component_subcomponent_...bottom_component_vrevision` and a
5 digit part number in the form `01234` (or `01234_vrevision` if a revision is
needed).

Examples:
- `CPU_ALU_1BitPlane_v0.1.0`
- `CPU_ALU_v1.2.5` (this would be a fully assembled set of boards making up the
  ALU)
- `53281_v6.2.5` (this is a static pointer in case the naming convention
  changes)

Files will be stored using the part number as the file name, but a list of
components may be found in the docs in the file `part_numbers.md`.