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History
rigor
05d6fadb70
feature: added ADDR6 connections to the bottom row
2026-08-02 13:06:41 -05:00
..
CPU_ALU_1Bit_v1.0.0
feature: more work on the alu
2026-06-29 00:01:52 -05:00
CPU_ALU_10Bit_v1.0.0
chore: not sure what this change is, honestly
2026-07-04 13:23:33 -05:00
CPU_ALU_10Bit_v1.1.0
chore: reduced transistor count of overall ALU
2026-07-04 13:52:19 -05:00
General_Buffer_10Bit_v1.0.0
fix: added a weak pull down to the enable pin of the buffer
2026-07-04 13:22:48 -05:00
General_MUX_4to16_v1.0.0
feature: added a 4 to 16 mux
2026-07-04 19:23:08 -05:00
Memory_Block_10BitX1Word_v1.0.0
fix: corrected an issue with 1 word memory block
2026-08-02 12:58:21 -05:00
Memory_Block_10BitX32Word_v1.0.0
feature: added ADDR6 connections to the bottom row
2026-08-02 13:06:41 -05:00
Memory_Latch_1Bit_v1.0.0
feature: added a 1 bit memory cell
2026-07-04 17:51:17 -05:00