 rigor
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05d6fadb70
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feature: added ADDR6 connections to the bottom row
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2026-08-02 13:06:41 -05:00 |
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rigor
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ef4c731d42
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feature: got the basic layout done (need to wire in addressing lines)
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2026-08-02 12:58:48 -05:00 |
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rigor
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57cd958212
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fix: corrected an issue with 1 word memory block
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2026-08-02 12:58:21 -05:00 |
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rigor
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2d824dc334
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feature: fixed the 1 word memory block package
- it used to use busses on the package, but that apparently does not work
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2026-08-02 09:45:15 -05:00 |
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rigor
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d38d4cb411
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chore: cleaned up alu reserved space
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2026-07-26 14:24:50 -05:00 |
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rigor
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bd05b901bb
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feature: added docs for ALU instruction set
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2026-07-26 14:18:24 -05:00 |
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rigor
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4aca2cda51
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fix: made the inputs and outputs into tunnels so the alu thing can be used as a subcircuit
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2026-06-22 20:24:27 -05:00 |
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rigor
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cd1c75ee67
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chore: turned off constant voltage sources
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2026-06-22 20:17:31 -05:00 |
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rigor
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c0b8efe8e0
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feature: got the first alu card done (I think)
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2026-06-22 20:15:18 -05:00 |
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rigor
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060454fbad
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more work on 1bit alu
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2026-06-21 23:49:54 -05:00 |
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