43 lines
1.6 KiB
Markdown
43 lines
1.6 KiB
Markdown
# ORGComp Hardware
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## Overview
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This project is one that I started a long time ago. I started off designing it
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with BJTs, and then decided to swap to FETs and got bored.
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This project is a fully custom design for a computer, designed from the
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transistor level up. I am making this because I find computing *fascinating*,
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and because I think it would be a cool project to show off at opensauce
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sometime.
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Documentation once made will be available in the `docs` directory and may be
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rendered using `mdbook`.
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Files in the `sims` directory are save files for `SimulIDE` (available in
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several Linux package repositories). I will try to have some 'train of thought'
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notes in text boxes in these files, and I intend to keep them as a record of
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how decisions were made so I can go back and see my growth and the project's
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history better.
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## Part Names
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Since I want this project to be somewhat modular to aide in abstraction,
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maintenance, and debugging, I have decided to make a naming scheme that will
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guarantee that parts are named in a way that is easy to find and easy to expand
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and modify.
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The naming scheme I plan on using is two-fold: each part will be assigned a
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name in the form `component_subcomponent_...bottom_component_vrevision` and a
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5 digit part number in the form `01234` (or `01234_vrevision` if a revision is
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needed).
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Examples:
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- `CPU_ALU_1BitPlane_v0.1.0`
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- `CPU_ALU_v1.2.5` (this would be a fully assembled set of boards making up the
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ALU)
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- `53281_v6.2.5` (this is a static pointer in case the naming convention
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changes)
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Files will be stored using the part number as the file name, but a list of
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components may be found in the docs in the file `part_numbers.md`.
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